In the semiconductor packaging industry, increased density of chip packaging is highly desirable, so long as thermal and conductivity problems are addressed.
The prior art teaches that a package could be formed by rigidly securing semiconductor chips to fixed surfaces, encapsulating them and then stacking the encapsulated chips.
The art also teaches that semiconductor chips can be used in a so-called cube. This cube is formed by stacking the chips such that the back surface of one chip abuts the front surface of an adjacent chip, and then rigidly enclosing the stack of chips in an encapsulation material.
Still further the prior art teaches coating the surface of each chip with an insulating material, mounting the chip vertically with respect to a surface, and affixing heat sinks to each chip over the insulating material and inserting these heat sinks into a cover unit.
The arrangements taught by the above cited prior art all lack mechanical resiliency and have failed due to mechanical shock or vibration. Also, these arrangements generally have poor heat transmission capabilities.
Thus, the industry has been seeking a package for semiconductor devices that is light weight, provides better cooling than that achieved by known prior art structures, is easy to assemble and provides better mechanical shock and vibration protection.